PCIIDE(4) BSD Programmer's Manual PCIIDE(4)
pciide - PCI IDE controller driver
pciide* at pci ? dev ? function ? flags 0x0000 option PCIIDE_AMD756_ENABLEDMA option PCIIDE_CMD064x_DISABLE option PCIIDE_CMD0646U_ENABLEUDMA atapiscsi* at pciide? channel ? flags 0x0000 wd* at pciide? channel ? drive ? flags 0x0000
The pciide driver supports the PCI IDE controllers as specified in the "PCI IDE controller specification, revision 1.0" draft, as well as the Serial ATA controllers working either in parallel ATA compatibility mode or in native serial mode. It provides the core functions for the wd(4) and atapiscsi(4) drivers. This driver includes specific, enhanced support for the CMD Tech PCI0640 controller and IDE DMA/UltraDMA support for the following PCI IDE controllers: • Acard ATP850U, ATP860, ATP860-A, ATP865-A, ATP865-R • Acer Labs M5229 • Advanced Micro Devices AMD-756, AMD-766, AMD-768, AMD-8111 • CMD Tech PCI0640, PCI0643, PCI0646, PCI0648, PCI0649, PCI0680 • Contaq Microsystems/Cypress CY82C693 • HighPoint HPT366, HPT370, HPT372, HPT302, HPT371, HPT374 • Intel PIIX, PIIX3, and PIIX4 • Intel 82801 (ICH/ICH0/ICH2/ICH3/ICH4/ICH4-M/ICH5/ICH5R) • ITE IT8212F • National Semiconductor PC87415 • National Semiconductor SCx200 (found on SC1100 SoC) • NVIDIA nForce/nForce2 (SATA controllers are not supported) • Promise PDC20246, PDC20262, PDC20265, PDC20267, PDC20268, PDC20268R, PDC20269, PDC20271, PDC20275, PDC20276, PDC20277, PDC20376 • ServerWorks OSB4, CSB5, CSB6 (including support for the third channel) • Silicon Image SiI3112 • Silicon Integrated System 5513 (5597/5598), 540, 550, 620, 630, 630S, 633, 635, 640, 645, 645DX, 648, 650, 651, 652, 655, 658, 730, 733, 735, 740, 745, 746, 748, 750, 751, 752, 755, 962, 963 • VIA Technologies VT82C586/A/B, VT82C596A/B, VT82C686A/B, VT8231, VT8366, VT8233, VT8235, VT8237 Some of these controllers are only available in multifunction PCI chips. The 0x0001 flag forces the pciide driver to use DMA when there is no ex- plicit DMA mode setting support for the controller but DMA is present. If the BIOS didn't configure the controller properly, this can cause a machine hang.
atapiscsi(4), intro(4), pci(4), scsi(4), wd(4), wdc(4)
There's no way to know reliably if a CMD064x controller is enabled or not. If the driver finds a PCI064x, it will assume it is enabled unless PCIIDE_CMD064x_DISABLE is specified in the kernel config file. This will be a problem only if the controller has been disabled in the BIOS and another controller has been installed which uses the ISA legacy I/O ports and interrupts. The CMD0646U is reportedly unable to operate properly in UltraDMA mode. UltraDMA will not be enabled on this controller unless PCIIDE_CMD0646U_ENABLEUDMA is specified in the kernel config file. For proper operation of UltraDMA 3 and higher modes a 40-pin, 80- conductor cable must be used. On some controllers, the pciide driver can probe the chip and see if it detects that an 80-conductor or 40-conductor cable was used. If not, it will down-grade to UltraDMA 2 mode. On other controllers, no such capability exists, and the driver assumes you are using an 80-conductor cable. If you are getting errors about corrupted data, check to make sure you are using the correct cable. An 80-conductor cable is recommended for any IDE installation, not just ones using faster UltraDMA modes, because it will decrease electrical noise and increase data reliability. The AMD756 chip revision D2 has a bug affecting DMA (but not Ultra-DMA) modes. The workaround documented by AMD is to not use DMA on any drive which does not support Ultra-DMA modes. This does not appear to be neces- sary on all drives, the PCIIDE_AMD756_ENABLEDMA option can be used to force multiword DMA on the buggy revisions. Multiword DMA can eventually be disabled on a per-drive basis with config flags, see wd(4). The bug, if triggered, will cause a total system hang. The timings used for the PIO and DMA modes for controllers listed above are for a PCI bus running at 30 or 33 MHz. These timings will work on a slower bus, but they may cause errors on an over-clocked bus. MirOS BSD #10-current October 15, 1998 1
Generated on 2015-10-06 19:36:22 by $MirOS: src/scripts/roff2htm,v 1.80 2015/01/02 13:54:19 tg Exp $
These manual pages and other documentation are copyrighted by their respective writers;
their source is available at our CVSweb,
AnonCVS, and other mirrors. The rest is Copyright © 2002–2015 The MirOS Project, Germany.
This product includes material provided by Thorsten Glaser.
This manual page’s HTML representation is supposed to be valid XHTML/1.1; if not, please send a bug report – diffs preferred.