SCF(4) BSD Programmer's Manual (SPARC) SCF(4)
scf - SPARC Force sysconfig driver
scf0 at mainbus0
The scf driver provides access to the system configuration registers on the Force CPU-5. The system configuration registers control the LED display on the front panel, the status of the rotary switch, and the flash programming control registers. By setting the sysctl(8) value machdep.led_blink to a non-zero value, the two user LEDs will blink back and forth at a rate of 1 second per point of load average. The seven segment LED will also show a numeric value for the load average (in hex), and with load averages higher than 15, the de- cimal point will be lit.
The scf device responds to the following ioctl(2) calls defined in <machine/scfio.h>: SCFIOCSLED1 (u_int8_t) Set LED1 register based on the bits below. #define SCF_LED_COLOR_MASK 0x03 /* color bits */ #define SCF_LED_COLOR_OFF 0x00 /* led off */ #define SCF_LED_COLOR_GREEN 0x01 /* green led */ #define SCF_LED_COLOR_RED 0x02 /* red led */ #define SCF_LED_COLOR_YELLOW 0x03 /* yellow led */ #define SCF_LED_BLINK_MASK 0x0c /* blink bits */ #define SCF_LED_BLINK_NONE 0x00 /* steady led */ #define SCF_LED_BLINK_HALF 0x04 /* blink 1/2 hz */ #define SCF_LED_BLINK_ONE 0x08 /* blink 1 hz */ #define SCF_LED_BLINK_TWO 0x0c /* blink 2 hz */ SCFIOCGLED1 (u_int8_t) Retrieve the value of the LED1 register (bits defined above). SCFIOCSLED2 (u_int8_t) Set the value of the LED2 register (bits defined above). SCFIOCGLED2 (u_int8_t) Retrieve the value of the LED2 register (bits defined above). SCFIOCSLED7 (u_int8_t) Set the value of the 7-segment LED based on the bits below: #define SCF_7LED_A 0x01 /* Layout: */ #define SCF_7LED_B 0x02 /* AAA */ #define SCF_7LED_C 0x04 /* FF BB */ #define SCF_7LED_D 0x08 /* GGG */ #define SCF_7LED_E 0x10 /* EE CC */ #define SCF_7LED_F 0x20 /* DDD P */ #define SCF_7LED_G 0x40 #define SCF_7LED_P 0x80 SCFIOCGROT (u_int8_t) Retrieve the value of the 16 position rotary switch on the front panel. SCFIOSFMCTRL (u_int8_t) Set up the flash memory for writing based on the bits below: #define SCF_FMCTRL_SELROM 0x01 /* sel 1st/2nd device */ #define SCF_FMCTRL_SELBOOT 0x02 /* sel boot/user flash */ #define SCF_FMCTRL_WRITEV 0x04 /* write voltage */ #define SCF_FMCTRL_SELADDR 0x38 /* addr 21:19 bits */ The SCF_FMCTRL_SELROM bit, if clear, selects the first flash device, otherwise the second flash device is selected. The SCF_FMCTRL_SELBOOT bit, if set, selects the user flash, otherwise the boot flash is selected. Setting the SCF_FMCTRL_WRITEV bit turns on the write voltage. The SCF_FMCTRL_SELADDR bits determine which window of 512 KBytes is ac- tive for reading/writing.
ioctl(2), intro(4), sysctl(8)
OpenBSD support for the scf first appeared in OpenBSD 2.6.
The driver for the scf was written by Jason L. Wright <firstname.lastname@example.org> under contract with RTMX Incorporated. MirOS BSD #10-current July 25, 1999 1
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